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FEATURES
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LTC6410-6 Low Distortion, Low Noise Differential IF Amplifier with Configurable Input Impedance DESCRIPTION
The LTC(R)6410-6 is a low distortion, low noise differential IF amplifier with configurable input impedance designed for use in applications from DC to 1.4GHz. The LTC6410-6 has 6dB of voltage gain. The LTC6410-6 is an excellent choice for interfacing active mixers to SAW filters. It features an active input termination that allows a customized input impedance for an optimum interface to differential active mixers. This feature provides additional power gain because of the impedance conversion and improved noise performance when compared to traditional 50 interface circuits. The LTC6410-6 drives a differential 50 load directly with low distortion, which is suitable for driving SAW filters and other 50 signal chain blocks. The LTC6410-6 operates on 3V or 5V supplies. It comes in a compact 16-lead 3mm x 3mm QFN package and operates over a -40C to 85C temperature range.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
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1.4GHz -3dB Bandwidth Fixed Voltage Gain of 6dB (50 System) Configurable Input Impedance Allows: Simple Interface to Active Mixers Improved Noise Performance Wide 2.8V to 5.25V Supply Range Low Distortion: 36dBm OIP3 (70MHz) 33dBm OIP3 (140MHz) 31dBm OIP3 (300MHz) Low Noise: 11dB NF (50 ZIN) 8dB NF (200 ZIN) Differential Inputs and Outputs Self-Biasing Inputs/Outputs Shutdown Mode Minimal Support Circuitry Required 16-Lead 3mm x 3mm x 0.8mm QFN Package
APPLICATIONS
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Post-Mixer Gain Block SAW Filter Interface/Buffering Differential IF Signal Chain Gain Block Differential Line Driver/Receiver
TYPICAL APPLICATION
Post Mixer Gain Block (140MHz IF)
5V 5V 680pF V+ SHDN -OUT LTC6410-6 24nH +IN 12pF 1760MHz LO LT5527 MIXER 18pF +TERM V- 0.1F +OUT VBIAS
64106 TA01a
2-Tone Spectrum Analyzer Plot
0 -10 -20 0.1F OUTPUT POWER (dBm)
82nH
82nH 24nH 12pF 18pF -TERM -IN
-30 -40 -50 -60 -70 -80 -90
SYSTEM OIP3 = 29dBm AT 1900MHz SYSTEM NF = 15dB AT 1900MHz
-100 130 132 134 136 138 140 142 144 146 148 150 FREQUENCY (MHz)
64106 TA01b
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LTC6410-6 ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
+TERM -TERM 12 V- 17 11 SHDN 10 V+ 9 V- 5 V+ 6 +OUT 7 -OUT 8 V+ TOP VIEW +IN -IN
Total Supply Voltage (V+ to V-) ................................5.5V Amplifier Input Current (DC) (+IN, -IN, +TERM, -TERM) .............................10mA Amplifier Input Power (AC) (+IN, -IN, +TERM, -TERM) .............................18dBm Input Current (VBIAS, SHDN) ................................10mA Output Current (+OUT, -OUT) ..............................50mA Operating Temperature Range (Note 2).... -40C to 85C Specified Temperature Range (Note 3) .... -40C to 85C Storage Temperature Range................... -65C to 150C Junction Temperature .......................................... 150C Lead Temperature (Soldering, 10 sec) .................. 300C
16 15 14 13 V- 1 VBIAS 2 V+ 3 V- 4
UD PACKAGE 16-LEAD (3mm x 3mm) PLASTIC QFN TJMAX = 150C, JA = 68C/W, JC = 4.2C/W EXPOSED PAD (PIN 17) IS V-, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH LTC6410CUD-6#PBF LTC6410IUD-6#PBF TAPE AND REEL LTC6410CUD-6#TRPBF LTC6410IUD-6#TRPBF PART MARKING* LDBG LDBG PACKAGE DESCRIPTION 16-Lead (3mm x 3mm) Plastic QFN 16-Lead (3mm x 3mm) Plastic QFN TEMPERATURE RANGE (Notes 2, 3) -40C to 85C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 3V, V- = 0V, SHDN = 2V, +IN is shorted to +TERM, -IN is shorted to -TERM, VBIAS = 1.5V, +IN = -IN = 1.5V, input source resistance (RS) is 25 on each input (50 differential), RL = 50 from +OUT to -OUT, unless otherwise noted. VBIAS is defined as the voltage on the VBIAS pin. VOUTCM is defined as (+OUT + -OUT)/2. VINCM is defined as (+IN + -IN)/2. VINDIFF is defined as (+IN - -IN). VOUTDIFF is defined as (+OUT - -OUT). See DC test circuit schematic.
SYMBOL GDIFF TC GDIFF VSWINGDIFF VSWINGMIN VSWINGMAX IOUT VOS PARAMETER Differential Gain (Low Frequency S21) Differential Gain Temperature Coefficient Differential Output Voltage Swing Output Swing Low Output Swing High Output Current Drive Input Offset Voltage
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3V DC ELECTRICAL CHARACTERISTICS
CONDITIONS VINDIFF = 0.2V
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MIN 5.0 4.7
TYP 6.0 0.003
MAX 6.7 7.0
UNITS dB dB dB/C VP-P VP-P
VOUTDIFF, VINDIFF = 2V Single-Ended +OUT, -OUT, VINDIFF = 2V Single-Ended +OUT, -OUT, VINDIFF = 2V Short +OUT to -OUT, VINDIFF = 2V (Note 4)
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2.2 2.0
2.8 0.7 0.9 1.0
V V V V mA mA
1.9 1.8 38 36 -2.0 -3.0
2.1 42 0.4 2.0 3.0
mV mV
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LTC6410-6 3V DC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 3V, V- = 0V, SHDN = 2V, +IN is shorted to +TERM, -IN is shorted to -TERM, VBIAS = 1.5V, +IN = -IN = 1.5V, input source resistance (RS) is 25 on each input (50 differential), RL = 50 from +OUT to -OUT, unless otherwise noted. VBIAS is defined as the voltage on the VBIAS pin. VOUTCM is defined as (+OUT + -OUT)/2. VINCM is defined as (+IN + -IN)/2. VINDIFF is defined as (+IN - -IN). VOUTDIFF is defined as (+OUT - -OUT). See DC test circuit schematic.
SYMBOL TC VOS VOSINCM AV IVRMIN IVRMAX RINDIFF XINDIFF RINCM CMRR RODIFF XOUTDIFF ROUTCM GCM VOCMMIN VOCMMAX VOSCM RVOCM CVBIAS SHDN Pin VIL VIH IIL IIH Power Supply VS IS ISSHDN PSRR Operating Range Supply Current
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PARAMETER Input Offset Voltage Drift Common Mode Offset Voltage Internal Voltage Gain Input Common Mode Voltage Range, (Min) Input Common Mode Voltage Range, (Max) Differential Input Resistance Differential Input Reactance Input Common Mode Resistance Common Mode Rejection Ratio Differential Output Resistance Differential Output Reactance Common Mode Output Resistance Common Mode Gain Output Common Mode Voltage Adjustment Range, (Min) Output Common Mode Voltage Adjustment Range, (Max)
CONDITIONS
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MIN -40 -50
TYP -0.3 13 2.7
MAX 40 50 1.0
UNITS V/C mV mV V/V V V
VOUTCM - VINCM
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2.0 40 30 58 1 1000 80 100
VINDIFF = 100mV (Note 4) f = 100MHz VBIAS = 1.5V, +IN = -IN = 1V to 2V, (VOUTDIFF /Gain) VOUTDIFF = 100mV (Note 4) f = 100MHz
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pF dB
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45 17 13
60 22 10 7 38 47
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Bias Voltage Control (VBIAS Pin) VBIAS = 1.2V to 1.8V (+IN and -IN floating), VOUTCM /(0.6V)
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0.7 0.6
0.86 1.0
1.0 1.0 1.2
V/V V/V V V
1.8 -200 -400 2.4 2.0
2.0 100 3.0 3 300 400 3.6 4.0
Output Common Mode Offset Voltage VOUTCM - VBIAS VBIAS Input Resistance VBIAS Input Capacitance SHDN Input Low Voltage SHDN Input High Voltage SHDN Input Low Current SHDN Input High Current SHDN = 0.8V SHDN = 2V
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mV mV k k pF V
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0.8 -200 -150 2.8
1.0 1.8 -85 -30 2 0 0 5.25 104 130 140 5
V A A V mA mA mA dB
Supply Current in Shutdown Power Supply Rejection Ratio
SHDN = 0.8V V+ = 2.8V to 5.25V, VBIAS = +IN = -IN = V+/2
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3 73 100
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LTC6410-6 5V DC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 5V, V- = 0V, SHDN = 3V, +IN is shorted to +TERM, -IN is shorted to -TERM, VINCM = VBIAS = 2.5V, +IN = -IN = 2.5V, input source resistance (RS) is 25 on each input (50 differential), RL = 50 from +OUT to -OUT, unless otherwise noted. VBIAS is defined as the voltage on theVBIAS pin. VOUTCM is defined as (+OUT + -OUT)/2. VINCM is defined as (+IN + -IN)/2. VINDIFF is defined as (+IN - -IN). VOUTDIFF is defined as (+OUT - -OUT). See DC test circuit schematic.
SYMBOL GDIFF VSWINGDIFF VSWINGMIN VSWINGMAX IS SHDN Pin VIL VIH IIL IIH SHDN Input Low Voltage SHDN Input High Voltage SHDN Input Low Current SHDN Input High Current SHDN = 1.8V SHDN = 3V
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PARAMETER Differential Gain (Low Frequency S21) Differential Output Voltage Swing Output Swing Low Output Swing High Supply Current
CONDITIONS VIN = 0.2V VOUTDIFF, VIN = 4V Single-Ended +OUT, -OUT, VIN = 4V Single-Ended +OUT, -OUT, VIN = 4V
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MIN 5 4.7 4.1 3.5
TYP 6.1 4.8 1.1
MAX 6.7 7.0
UNITS dB dB VP-P VP-P
1.4 1.6
V V V V
3.2 3.0
3.5 125 150 160
mA mA V
1.8 -300 -200
2.0 2.8 -110 -60 3 0 0
V A A
AC ELECTRICAL CHARACTERISTICS + The l denotes the specifications which apply over the full operating -
SYMBOL -3dBBW 0.1dBBW 0.5dBBW SR ts tON tOFF PARAMETER -3dB Bandwidth Bandwidth for 0.1dB Flatness Bandwidth for 0.5dB Flatness Slew Rate 1% Settling Time Turn-On Time Turn-Off Time 1% Settling for a 1VP-P VOUTDIFF Step SHDN = 0V to 3V, +OUT and -OUT Within 10% of Final Values SHDN = 3V to 0V, +OUT and -OUT Within 10% of Final Values 0.2VP-P at VBIAS, Measured VOUTCM CONDITIONS VINDIFF = -10dBm VINDIFF = -10dBm VINDIFF = -10dBm MIN 1 TYP 1.4 150 300 1.5 3 30 30 1 100 MAX
temperature range, otherwise specifications are at TA = 25C. V = 3V, V = 0V, SHDN = 2V, +IN is shorted to +TERM, -IN is shorted to -TERM, VINCM = VBIAS = 1.5V, input source resistance (RS) is 25 on each input (50 differential), RL = 50 from +OUT to -OUT, +IN and -IN are AC-coupled, unless otherwise noted. VBIAS is defined as the voltage on theVBIAS pin. VOUTCM is defined as (+OUT + -OUT)/2. VINCM is defined as (+IN + -IN)/2. VINDIFF is defined as (+IN - -IN). VOUTDIFF is defined as (+OUT - -OUT).
UNITS GHz MHz MHz V/ns ns ns ns GHz V/s
Common Mode Voltage Control (VBIAS Pin) -3dBBWCM Common Mode Small-Signal -3dB Bandwidth SRCM 10MHz Signal HD2 HD3 Second Harmonic Distortion Third Harmonic Distortion VOUTDIFF = 0dBm VOUTDIFF = 0dBm -85 -71 dBc dBc Common Mode Slew Rate
Noise/Harmonic Performance Input/Output Characteristics
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LTC6410-6 AC ELECTRICAL CHARACTERISTICS + The l denotes the specifications which apply over the full operating -
SYMBOL IM3 PARAMETER Third Order Intermodulated Distortion CONDITIONS F1 = 9.5MHz, F2 = 10.5MHz, VOUTDIFF = 0dBm/Tone F1 = 9.5MHz, F2 = 10.5MHz, VOUTDIFF = -5dBm/Tone F1 = 9.5MHz, F2 = 10.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V OIP3 Output Third-Order Intercept F1 = 9.5MHz, F2 = 10.5MHz, VOUTDIFF = 0dBm/Tone F1 = 9.5MHz, F2 = 10.5MHz, VOUTDIFF = -5dBm/Tone F1 = 9.5MHz, F2 = 10.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V P1dB NF 70MHz Signal HD2 HD3 IM3 Second Harmonic Distortion Third Harmonic Distortion Third Order Intermodulated Distortion VOUTDIFF = 0dBm VOUTDIFF = 0dBm F1 = 69.5MHz, F2 = 70.5MHz, VOUTDIFF = 0dBm/Tone F1 = 69.5MHz, F2 = 70.5MHz, VOUTDIFF = -5dBm/Tone F1 = 69.5MHz, F2 = 70.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V OIP3 Output Third-Order Intercept F1 = 69.5MHz, F2 = 70.5MHz, VOUTDIFF = 0dBm/Tone F1 = 69.5MHz, F2 = 70.5MHz, VOUTDIFF = -5dBm/Tone F1 = 69.5MHz, F2 = 70.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V P1dB NF Output 1dB Compression Point Noise Figure ZIN = 50 (Note 5) ZIN = 200 VOUTDIFF = 0dBm VOUTDIFF = 0dBm F1 = 139.5MHz, F2 = 140.5MHz, VOUTDIFF = 0dBm/Tone F1 = 139.5MHz, F2 = 140.5MHz, VOUTDIFF = -5dBm/Tone F1 = 139.5MHz, F2 = 140.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V F1 = 130MHz, F2 = 150MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V OIP3 Output Third-Order Intercept F1 = 139.5MHz, F2 = 140.5MHz, VOUTDIFF = 0dBm/Tone F1 = 139.5MHz, F2 = 140.5MHz, VOUTDIFF = -5dBm/Tone F1 = 139.5MHz, F2 = 140.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V F1 = 130MHz, F2 = 150MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V P1dB Output 1dB Compression Point 28 -85 -69 -72 -79 -72 36 35 36 12.8 11 8 -80 -62 -62 -70 -66 -66 31 30 33 33 12.8 -56 dBc dBc dBc dBc dBc dBm dBm dBm dBm dB dB dBc dBc dBc dBc dBc dBc dBm dBm dBm dBm dBm
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temperature range, otherwise specifications are at TA = 25C. V = 3V, V = 0V, SHDN = 2V, +IN is shorted to +TERM, -IN is shorted to -TERM, VINCM = VBIAS = 1.5V, input source resistance (RS) is 25 on each input (50 differential), RL = 50 from +OUT to -OUT, +IN and -IN are AC-coupled, unless otherwise noted. VBIAS is defined as the voltage on theVBIAS pin. VOUTCM is defined as (+OUT + -OUT)/2. VINCM is defined as (+IN + -IN)/2. VINDIFF is defined as (+IN - -IN). VOUTDIFF is defined as (+OUT - -OUT).
MIN TYP -72 -81 -66 36 36 33 12.8 ZIN = 50 (Note 5) ZIN = 200 11 8 MAX UNITS dBc dBc dBc dBm dBm dBm dBm dB dB
Output 1dB Compression Point Noise Figure
140MHz Signal HD2 HD3 IM3 Second Harmonic Distortion Third Harmonic Distortion Third Order Intermodulated Distortion
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LTC6410-6 AC ELECTRICAL CHARACTERISTICS + The l denotes the specifications which apply over the full operating -
temperature range, otherwise specifications are at TA = 25C. V = 3V, V = 0V, SHDN = 2V, +IN is shorted to +TERM, -IN is shorted to -TERM, VINCM = VBIAS = 1.5V, input source resistance (RS) is 25 on each input (50 differential), RL = 50 from +OUT to -OUT, +IN and -IN are AC-coupled, unless otherwise noted. VBIAS is defined as the voltage on theVBIAS pin. VOUTCM is defined as (+OUT + -OUT)/2. VINCM is defined as (+IN + -IN)/2. VINDIFF is defined as (+IN - -IN). VOUTDIFF is defined as (+OUT - -OUT).
PARAMETER Noise Figure CONDITIONS ZIN = 50 (Note 5) ZIN = 200 VOUTDIFF = 0dBm VOUTDIFF = 0dBm F1 = 239.5MHz, F2 = 240.5MHz, VOUTDIFF = 0dBm/Tone F1 = 239.5MHz, F2 = 240.5MHz, VOUTDIFF = -5dBm/Tone F1 = 239.5MHz, F2 = 240.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V OIP3 Output Third-Order Intercept F1 = 239.5MHz, F2 = 240.5MHz, VOUTDIFF = 0dBm/Tone F1 = 239.5MHz, F2 = 240.5MHz, VOUTDIFF = -5dBm/Tone F1 = 239.5MHz, F2 = 240.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V P1dB NF Output 1dB Compression Point Noise Figure ZIN = 50 (Note 5) ZIN = 200 VOUTDIFF = 0dBm VOUTDIFF = 0dBm F1 = 379.5MHz, F2 = 380.5MHz, VOUTDIFF = 0dBm/Tone F1 = 379.5MHz, F2 = 380.5MHz, VOUTDIFF = -5dBm/Tone F1 = 379.5MHz, F2 = 380.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V OIP3 Output Third-Order Intercept F1 = 379.5MHz, F2 = 380.5MHz, VOUTDIFF = 0dBm/Tone F1 = 379.5MHz, F2 = 380.5MHz, VOUTDIFF = -5dBm/Tone F1 = 379.5MHz, F2 = 380.5MHz, VOUTDIFF = 0dBm/Tone, VCC = 5V, VBIAS = 2.5V, SHDN = 3V P1dB NF Output 1dB Compression Point Noise Figure ZIN = 50 (Note 5) ZIN = 200 MIN TYP 11 7 -66 -52 -54 -63 -64 27 27 32 12.8 11 8 -57 -45 -51 -64 -60 26 27 30 10.8 12 8 sampled at these temperatures. The LT6410I-6 is guaranteed to meet specified performance from -40C to 85C. Note 4: This parameter is pulse tested. Note 5: en can be calculated from ZIN = 50 NF with the formula:
NF
SYMBOL NF
MAX
UNITS dB dB dBc dBc dBc dBc dBc dBm dBm dBm dBm dB dB dBc dBc dBc dBc dBc dBm dBm dBm dBm dB dB
240MHz Signal HD2 HD3 IM3 Second Harmonic Distortion Third Harmonic Distortion Third Order Intermodulated Distortion
380MHz Signal HD2 HD3 IM3 Second Harmonic Distortion Third Harmonic Distortion Third Order Intermodulated Distortion
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC6410C-6/LTC6410I-6 is guaranteed functional over the operating temperature range of -40C to 85C. Note 3: The LTC6410C-6 is guaranteed to meet specified performance from 0C to 70C. It is designed, characterized and expected to meet specified performance from -40C and 85C but is not tested or QA
en = (10 10 - 1)4kT50 where k = Boltzmann's constant and T = absolute temperature
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LTC6410-6 TYPICAL PERFORMANCE CHARACTERISTICS
Output Third Order Intercept vs Frequency
40 38 36 OIP3 (dBm) 34 32 30 28 26 24 22 0 50 100 150 200 250 300 350 400 FREQUENCY (MHz)
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Output Third Order Intercept vs Frequency (ZIN = 200)
38 36 34 OIP3 (dBm) 32 30 28 26 24 22 0 50 100 150 200 250 300 350 400 FREQUENCY (MHz)
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Third Order Intermodulation Distortion vs Frequency vs Power
0 -10 THIRD ORDER IMD (dBc) -20 -30 -40 -50 -60 -70 -80 -90 -100 -5 0 -2.5 2.5 OUTPUT POWER (dBm) 5
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V+ = 3V V- = 0V ZIN = 50 RL = 50 VBIAS = 1.5V POUT = 0dBm
V+ = 3V V- = 0V ZIN = 200 RL = 50 VBIAS = 1.5V POUT = 0dBm
V+ = 3V V- = 0V ZIN = 50 RL = 50 380MHz
240MHz 140MHz
10MHz 70MHz 30MHz
Third Order Intermodulation Distortion vs Frequency vs Power (ZIN = 200)
0 -10 THIRD ORDER IMD (dBc) -20 -30 -40 -50 -60 -70 -80 -90 -5 10MHz 70MHz -67.5 5
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Third Order Intermodulation Distortion vs Temperature
-50.0 -52.5
Output 1dB Compression vs Frequency
19 ZIN = 50 + 18 V = 3V V- = 0V 17 VBIAS = 1.5V 16 15 14 13 12 11 10 0 50 100 150 200 250 300 350 400 FREQUENCY (MHz)
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380MHz 240MHz
-55.0 -57.5 -60.0 -62.5 -65.0 V+ = 3V V- = 0V ZIN = 50 RL = 50 FREQ = 139.5MHz, 140.5MHz POUT = 0dBm VBIAS = 1.5V 0 25 50 75 100 125 150 TEMPERATURE (C)
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140MHz
30MHz
0 -2.5 2.5 OUTPUT POWER (dBm)
-70.0 -50 -25
Output Third Order Intercept vs Frequency
40 38 36 OIP3 (dBm) 34 32 30 28 26 0 50 100 150 200 250 300 350 400 FREQUENCY (MHz)
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Output 1dB Compression vs Frequency
19 18 P1dB COMPRESSION (dBm) 17 16 15 14 13 12 11 10 0 V+ = 5V V- = 0V VBIAS = 2.5V 50 100 150 200 250 300 350 400 FREQUENCY (MHz)
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P1dB COMPRESSION (dBm) OIP3 (dBm)
THIRD ORDER IMD (dBc)
V+ = 3V V- = 0V ZIN = 200 RL = 50 VBIAS = 1.5V
Distortion vs Common Mode Voltage
40 35 30 25 20 15 10 5 V+ = 3V V- = 0V ZIN = 50 RL = 50 FREQ = 139.5MHz, 140MHz POUT = 0dBm 1.3 1.4 1.6 1.5 VBIAS (V) 1.7 1.8
V+ = 5V V- = 0V ZIN = 50 RL = 50 VBIAS = 2.5V POUT = 0dBm
0 1.2
64106 G09
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LTC6410-6 TYPICAL PERFORMANCE CHARACTERISTICS
Differential Gain vs Frequency (S21)
10 8 6 DIFFERENTIAL GAIN (dB) 4 2 0 -2 -4 -6 -8 -10 1 V+ = 3V V- = 0V ZIN = 50 10 100 FREQUENCY (MHz) 1000
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Differential Input Return Loss vs Frequency (S11)
DIFFERENTIAL OUTPUT RETURN LOSS (dB) 0 DIFFERENTIAL INPUT RETURN LOSS (dB) V+ = 3V V- = 0V ZIN = 50 0
Differential Output Return Loss vs Frequency (S22)
V+ = 3V V- = 0V ZIN = 50
-5
-5
-10
-10
-15
-15
-20
-20
-25 1 10 100 FREQUENCY (MHz) 1000
64106 G11
-25 1 10 100 FREQUENCY (MHz) 1000
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Differential Reverse Isolation vs Frequency (S12)
0 DIFFERENTIAL REVERSE ISOLATION (dB) -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 1 10 100 FREQUENCY (MHz) 1000 V+ = 3V V- = 0V ZIN = 50
Differential Input Return Loss vs Frequency on a Smith Chart (S11)
FREQ = 1MHz TO 2GHz V+ = 3V V- = 0V
Differential Output Return Loss vs Frequency on a Smith Chart (S22)
FREQ = 1MHz TO 2GHz V+ = 3V V- = 0V
100MHz 1MHz 1GHz 1MHz 100MHz 1GHz
64106 G14 64106 G13
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Small-Signal Transient
OUTPUT VOLTAGE (V) 1.58 OUTPUT VOLTAGE (V) 1.54 1.50 1.46 1.42 0 1.9 1.7 1.5 1.3
Large-Signal Transient
2.3 OUTPUT VOLTAGE (V) 2.5 5 7.5 TIME (ns) 10 15
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Overdrive Recovery
1.9 1.5 1.1 0.7 0
2.5
5 7.5 TIME (ns)
10
15
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1.1 0
5
10 15 TIME (ns)
20
25
64106 G18
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LTC6410-6 TYPICAL PERFORMANCE CHARACTERISTICS
Noise Figure vs Frequency vs ZIN
25.0 22.5 V 20.0 NOISE FIGURE (dB) 17.5 VOLTAGE (V) 15.0 12.5 ZIN = 50 10.0 7.5 5.0 2.5 0 10 100 FREQUENCY (MHz) 1000
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Turn-On Time
2.0 1.5 1.0 0.5 0 SHDN 2 -OUT +OUT VOLTAGE (V) 2.0 1.5 1.0 0.5 0
Turn-Off Time
V+ = 3V - = 0V
+OUT
-OUT
ZIN = 100
SHDN 2 0
ZIN = 400
ZIN = 200 0 -2 0 100 200 300 TIME (ns) 400 500
64106 G20
-2
0
100
300 200 TIME (ns)
400
500
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Spectrum Analyzer 2-Tone
0 10 20 OUTPUT POWER (dBm) GROUP DELAY (ns) 30 40 50 60 70 80 90 100 67.5 68.5 69.5 70.5 71.5 FREQUENCY (MHz) 72.5
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Group Delay and Phase vs Frequency
2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 10 100 1000 FREQUENCY (MHz) GROUP DELAY PHASE V+ = 3V 45 V- = 0V ZIN = 50 0 -45 PHASE (DEG) CMRR (dB) -90 -135 -180 -225 -270 -315 -360 10000
64106 G23
CMRR vs Frequency
90 100 V+ = 3V 90 V- = 0V Z = 50 80 IN 70 60 50 40 30 20 10 0 1 10 100 1000 FREQUENCY (MHz) 10000
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DC TEST CIRCUIT SCHEMATIC
V+ 3 V+ VBIAS VINDIFF = +IN - -IN VINCM = +IN + -IN 2 25 -IN +IN 25 SHDN 2 13 14 15 16 11 VBIAS -TERM -IN +IN SHDN V- 1 5 V+ 8 V+
10 V+ -OUT +OUT 7 -OUT RL = 50 6 +OUT VOUTDIFF = +OUT - -OUT VOUTCM = +OUT + -OUT 2
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LTC6410-6 V- 12
+TERM V- 4 V- 9
V-
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LTC6410-6 PIN FUNCTIONS
V- (Pins 1, 4, 9, 12, 17): Negative Power Supply (Normally Tied to Ground). All 5 pins must be tied to the same voltage. V- maybe tied to a voltage other than ground as long as the voltage between V+ and V- is 2.8V to 5.5V. If the V- pins are not tied to ground, bypass each with 680pF and 0.1F capacitors as close to the package as possible. VBIAS (Pin 2): This pin sets the input and output common mode voltage by driving the +IN and -IN through a buffer with a high output resistance of 1k. If the part is AC-coupled at the input, the VBIAS will set the VINCM and therefore the VOUTCM voltage. If the part is DC-coupled at the input, VBIAS should be left floating. Internal resistors bias VBIAS to 1.4V on a 3V supply. V+ (Pins 3, 5, 8, 10): Positive Power Supply. All 4 pins must be tied to the same voltage. Split supplies are possible as long as the voltage between V+ and V- is 2.8V to 5.5V. Bypass capacitors of 680pF and 0.1F as close to the part as possible should be used between supplies. +OUT, -OUT (Pins 6, 7): Outputs. These pins each have internal series termination resistors forming a differential output resistance. SHDN (Pin 11): This pin is internally pulled high by a typically 30k resistor to V+. By pulling this pin low the supply current will be reduced to typically 3mA. See DC Electrical Characteristics table for the specific logic levels. -TERM (Pin 13): Negative Input Termination. When tied directly to -IN, it provides an active 50 differential termination when +TERM is also tied directly to +IN. -IN (Pin 14): Negative Input. This pin is normally tied to -TERM, the input termination pin. If AC-coupled, this pin will self bias by VBIAS. +IN (Pin 15): Positive Input. This pin is normally tied to +TERM, the input termination pin. If AC-coupled, this pin will self bias by VBIAS. +TERM (Pin 16): Positive Input Termination. When tied directly to +IN, it provides an active 50 differential termination when -TERM is also tied directly to -IN. Exposed Pad (Pin 17): V-. The Exposed Pad must be soldered to the PCB metal.
BLOCK DIAGRAM
CEXT (OPT) REXT (OPT) RT 110
-TERM -IN V+ 6.4k VBIAS +1 5.7k
-IN
1k
--
AV = 2.7V/V
RO 11 RO 11
-OUT
0.1F 1k V- RT 110
+OUT
++
+IN
+IN +TERM REXT CEXT (OPT) (OPT)
64106 BD
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10
LTC6410-6 APPLICATIONS INFORMATION
Introduction The LTC6410-6 is a low noise differential high speed amplifier. By default, the LTC6410-6 has 6dB voltage gain and is designed to operate with 50 differential input and output impedances. By changing (REXT), alternative configurations provide input resistances of up to 400, with correspondingly lower noise figure and higher power gain. The Block Diagram shows the basic circuit along with key external components while Table 1 provides configuration information. If the input is AC-coupled, the VBIAS pin sets the input common mode voltage and therefore the output common mode voltage. Input Impedance LTC6410-6 has been designed with very flexible input termination circuitry. By default, with the termination pins connected directly to the inputs, the input impedance is 58, see the Block Diagram. Internally, there is 110 between each input and the opposite output (RT). Dividing the resistor by the internal noise gain of 2.7 + 1 = 3.7, 29.5 input impedance is created (59 differential ). In parallel with the 2k common mode resistance, a total of 58 differential input impedance is achieved. This method of termination is used to provide lower noise figure through the use of feedback which reduces the effective noise of the termination resistor. By adding additional resistance in series with the termination pins, higher input impedances can be obtained (see Table 1). The optimum impedance for minimizing the noise figure of the LTC6410-6 is close to 400. Because the amplifier is inherently a voltage amplifier, the difference between the impedance at the input and the output adds additional power gain as can be seen in Table 1. These higher impedance levels can be useful in interfacing with active mixers which can have output impedance of 400 and beyond. Input and Output Common Mode Bias The LTC6410-6 is internally self-biased through the VBIAS pin (see the Block Diagram). Therefore the LTC6410-6 can be AC-coupled with no external biasing circuitry. The output will have approximately the same common mode voltage as the input. In the case of a DC-coupled input connection, the input DC common mode voltage will also set the output common mode voltage. Note that a voltage divider is formed between the VBIAS buffer output and the DC input source impedance. The VBIAS pin has an internal voltage divider which will self bias to approximately 1.4V on a 3V supply (0.47 * VSUPPLY). An external capacitor of 0.1F to ground is recommended to bypass the pin. The resistance of the pin is 3k. See Distortion vs Common Mode graph. For increased common mode accuracy, the +TERM and -TERM pins can be AC-coupled to the inputs with capacitors (CEXT). This coupling prevents the feedback from the termination resistance from creating additional DC common mode voltage error. The GCM and VOSCM of the DC Electrical Characteristics table reflect the less accurate DC-coupled scenario. The termination inputs are part of a high speed feedback loop. The physical length of the termination loop (REXT and CEXT) must be minimized to maintain stability and minimize gain peaking. Gain Internally, the LTC6410-6 has a voltage gain of 2.7V/V. The default source and load resistances in most of the data sheet are assumed to be 50 differential. Due to the input and output resistance of the LTC6410-6 being 58 and 22 respectively, the overall voltage gain in a 50 system is 6dB (2V/V). Other source and load resistances will produce different gains due to the resistive dividers. Figure 1 is a system diagram for calculating gain.
RS RIN VS LTC6410-6
ROUT 22
64106 F01
RLOAD
Figure 1
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11
LTC6410-6 APPLICATIONS INFORMATION
Therefore the differential voltage gain can be calculated as follows: Voltage Gain = 2* RIN RL * 2.7 * RIN + RS RL + ROUT Output Impedance The LTC6410-6 is designed to drive a differential load of 50 with a total differential output resistance of 22. While the LTC6410-6 can source and sink approximately 50mA, large DC output current should be avoided. To test the part on traditional 50 test equipment, AC coupling or balun transformers (or both) may be necessary at the input and output. Supply Rails Inductance in the supply path can severely effect the performance of the LTC6410-6. Therefore it is recommended that low inductance bypass capacitors are installed very close to the part. 680pF and 0.1F sized capacitors are recommended. Additionally, the exposed pad of the part must be connected to V- for low inductance and low thermal resistance. Failure to provide a low impedance supply at high frequencies can cause oscillations and increased distortion. SHDN
2
The following is an example of the 50 gain calculation: Voltage Gain = 2* 58 50 * 2.7 * 58+50 50 + 22 = 2.0V/V = 6.0dB
The part also can be used with different input impedances providing no additional voltage gain, but a higher power gain. For example, the calculation for a 100 input impedance shows the effect of an impedance conversion. The voltage gain is calculated as follows: Voltage Gain = 2* 83 50 * 2.7 * 83+100 50 + 22 = 1.7V/V = 4.6dB
However the power gain is: Power Gain = 2* 83 50 * 2.7 * *2 83+100 50 + 22 = 5.8mW/mW = 7.6dB
The SHDN pin self-biases to V+ through a 30k resistor. The pin must be pulled below 0.8V in order to shut down the part. Applications Circuits The graphs on the following page are examples of the four differential input resistances used on the DC1103A demo board with balun transformers for interfacing with the 50 single-ended measurement equipment.
Table 1. Input Impedance
DIFFERENTIAL SOURCE RESISTANCE () (RS) 50 100 200 400 2000 EXTERNAL TERMINATION RESISTOR () (REXT) 0 49.9 249 750 Open EFFECTIVE DIFFERENTIAL DIFFERENTIAL INPUT LOAD OUTPUT IMPEDANCE () RESISTANCE () RESISTANCE () (RIN) 58 83 177 377 2000 50 50 50 50 50 22 22 22 22 22 VOLTAGE GAIN (SOURCE AND LOAD RESISTANCE AS STATED (V/V) 2.0 1.7 1.8 1.8 1.9
POWER GAIN (dB) 6.0 7.6 10.9 14.2 21.5
NF AT 10MHz (dB) 11 9 7 6 -
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LTC6410-6 APPLICATIONS INFORMATION
ZIN = 50, T1 = ETC1-1-13, T2 = ETC1-1-13
T1 1:1 IN 0.1F 0.1F -TERM -IN ZIN = 50 +IN +TERM
64106 TA03a
ZIN = 100, T1 = WBC2-1TL, T2 = ETC1-1-13
49.9 T1 1:2 OUT IN 0.1F 49.9 0.1F -TERM -IN -OUT LTC6410-6 +IN +TERM
64106 TA03a
T2 -OUT 1:1 +OUT
T2 1:1 +OUT OUT
LTC6410-6
ZIN = 100
25 15 GAIN AND NOISE FIGURE (dB) 5 -5 -15 -25 -35 -45 10 100 1000 FREQUENCY (MHz) NOISE FIGURE S21 S22 S11 S12
ZIN = 50 VCC = 3V GAIN AND NOISE FIGURE (dB)
25 15 5 -5 -15 -25 -35 -45 NOISE FIGURE S21 S22 S11
ZIN = 100 VCC = 3V
S12
10000
64106 TA02b
10
100 1000 FREQUENCY (MHz)
10000
64106 TA03b
ZIN = 200, T1 = WBC4-14L, T2 = ETC1-1-13
249 T1 1:4 IN 0.1F 249 0.1F -TERM -IN ZIN = 200 +IN +TERM
64106 TA04a
ZIN = 400, T1 = WBC8-1L, T2 = ETC1-1-13
750 T1 1:8 OUT IN 0.1F 750 0.1F -TERM -IN -OUT LTC6410-6 +IN +TERM
64106 TA05a
T2 -OUT 1:1 +OUT
T2 1:1 +OUT OUT
LTC6410-6
ZIN = 400
25 15 GAIN AND NOISE FIGURE (dB) 5 -5 -15 -25 S12 -35 -45 10 100 1000 FREQUENCY (MHz) S21 NOISE FIGURE S22 S11
GAIN AND NOISE FIGURE (dB)
ZIN = 200 V+ = 3V V- = 0V
25 15 5 -5 -15 -25 -35 -45 S12 10 100 1000 FREQUENCY (MHz) S22 S11 S21 NOISE FIGURE
ZIN = 400 V+ = 3V V- = 0V
10000
64106 TA04b
10000
64106 TA05b
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LTC6410-6 APPLICATIONS INFORMATION
Demoboard DC1103A Top Silkscreen
TYPICAL APPLICATION
SAW Filter Application
0.1F -TERM -IN V+ -OUT LTC6410-6 +OUT +IN +TERM 0.1F *COILCRAFT 0805CS 0 -10 V- 12.4 15pF 47nH*
64106 TA07
3V
12.4
47nH SAWTEK 854923 120nH* 15pF
The differential output of the LTC6410-6 allows differential driving of the SAW filter without the need for a transformer. The differential nature of the LTC6410-6 allows for ease of use in differential signal chains, and may reduce the need for transformers.
SAW Filter Application
The schematic above shows a typical signal chain application with the LTC6410-6 in combination with a 140MHz center frequency 24MHz bandwidth SAW filter. Without the LTC6410-6, the attenuation of the SAW would be -11.5dB. The networks between the LTC6410-6 and the SAW filter, and after the SAW filter are for proper impedance matching.
-20 S21 (dB) -30 -40 -50 -60 -70
90 100 110 120 130 140 150 160 170 180 190 FREQUENCY (MHz)
64106 TA08
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LTC6410-6 PACKAGE DESCRIPTION
UD Package 16-Lead Plastic QFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 0.05
3.50
0.05 2.10
1.45 0.05 0.05 (4 SIDES)
PACKAGE OUTLINE 0.25 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.75 0.05 BOTTOM VIEW--EXPOSED PAD R = 0.115 TYP 15 16 0.40 1 1.45 0.10 (4-SIDES) 2 0.10 PIN 1 NOTCH R = 0.20 TYP OR 0.25 45 CHAMFER
3.00 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6)
(UD16) QFN 0904
0.200 REF 0.00 - 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.25
0.05
0.50 BSC
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC6410-6 TYPICAL APPLICATION
Demoboard DC1103A Schematic
TP1 SHDN JP1 EN J1 C26 -IN (1) C31 0.1F T1 MABA-007159000000 DS C2 0.1F C25 OPT 12 R6 0 13 R8 0 14 R7 0 15 R5 0 16 C32 0.1F TP4 VBIAS TP5 GND C33 (1) VCC R19 OPT R20 OPT C1 0.1F 17 -TERM -IN +IN +TERM V- V- VBIAS V+ 1 2 3 LTC6410-6 11 10 V+ 9 V- V+ -OUT +OUT V+ V- 4 VCC C13 0.1F 8 7 6 5 R15 (1) C16 (1) C22 OPT C11 (1) T2 MABA-007159000000 V- SHDN C30 J4 0.1F -OUT VCC R16 10 C17 680pF C18 0.1F
J2 +IN
C3 (1)
J5 +OUT
C34 (1)
C4 0.1F
C7 0.1F
C12 680pF
J6 TEST IN
C28 0.1F
T3 MABA-007159000000
R23 0 C19 OPT R21 (1) R24 0 R22 (1) C20 OPT
T4 MABA-007159000000
C6 0.1F
J7 TEST OUT
64106 TA06
TP2 VCC 2.8V TO 5.5V C14 4.7F TP3 GND
VCC C15 1F
C29 0.1F
C5 0.1F
NOTE: UNLESS OTHERWISE SPECIFIED (1) NOT POPULATED
RELATED PARTS
PART NUMBER LT1993-2 LT1993-4 LT1993-10 LT5514 LT5522 LT5524 LT5525 LT5526 LT5527 LT5557 LTC6400-20 LTC6401-20 LT6402-6 LT6402-12 LT6402-20 LT6411 DESCRIPTION 800MHz Differential Amplifier/ADC Driver 900MHz Differential Amplifier/ADC Driver 700MHz Differential Amplifier/ADC Driver Ultralow Distortion IF Amplifier/ADC Driver 600MHz to 2.7GHz High Signal Level Downconverting Mixer Low Power, Low Distortion ADC Driver with Digitally Programmable Gain High Linearity, Low Power Downconverting Mixer High Linearity, Low Power Downconverting Mixer 400MHz to 3.7GHz High Signal Level Downconverting Mixer 400MHz to 3.8GHz High Signal Level Downconverting Mixer 1.8GHz Low Noise, Low Distortion ADC Driver for 300MHz IF 1.4GHz Low Noise, Low Distortion ADC Driver for 140MHz IF 300MHz Differential Amplifier/ADC Driver 300MHz Differential Amplifier/ADC Driver 300MHz Differential Amplifier/ADC Driver 650MHz Differential ADC Driver/Dual Selectable Gain Amplifier COMMENTS AV = 2V/V, NF = 12.3dB, OIP3 = 38dBm at 70MHz AV = 4V/V, NF = 14.5dB, OIP3 = 40dBm at 70MHz AV = 10V/V, NF = 12.7dB, OIP3 = 40dBm at 70MHz Digitally Controlled Gain Output IP3 47dBm at 100MHz 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50 Single-Ended RF and LO Ports, ROUT = 400 450MHz Bandwidth, 40dBm OIP3, 4.5dB to 27dB Gain Control Single-Ended 50 RF and LO Ports, 17.6dBm IIP3 at 1900MHz, ICC = 28mA 3V to 5.3V Supply, 16.5dBm IIP3, 100kHz to 2GHz RF NF = 11dB, , ICC = 28mA, -65dBm LO-RF Leakage CG = 2.3dB at 1900MHz, IIP3 = 23.5dBm at 1900MHz, 440mW, ROUT = 415 CG = 2.9dB at 1950MHz, IIP3 = 24.7dBm at 1950MHz, 300mW, ROUT = 560 AV = 20dB, ZIN = 200, IS(MAX) = 105mA at 25C AV = 20dB, ZIN = 200, IS(MAX) = 62mA at 25C AV = 6dB, en = 3.8nV/Hz at 20MHz, 150mW AV = 12dB, en = 2.6nV/Hz at 20MHz, 150mW AV = 20dB, en = 1.9nV/Hz at 20MHz, 150mW 3300V/s Slew Rate, 16mA Current Consumption, Selectable Gain: AV = -1, 1, 2
64106fa LT 0908 REV A * PRINTED IN USA
16 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007

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